1. Field of the Invention
The present invention relates to electronic components, and in particular, to electronic components including a plurality of elements mounted on common substrates via solder bumps.
2. Description of the Related Art
Various electronic components including a plurality of elements mounted on common substrates have been proposed.
For example, an electronic component shown in a cross-sectional view in FIG. 10 includes a surface acoustic wave filter 102 for reception and a surface acoustic wave filter 103 for transmission that are electrically connected to a multilayered ceramic substrate 101 using solder or gold bumps 105. The solder bumps are joined by reflowing, and the gold bumps are joined by ultrasonic bonding (for example, see Japanese Unexamined Patent Application Publication No. 2003-198325).
In general, when solder bumps are used, an insulating film 50x including openings 52x is provided on a conductive pattern 42x provided on a common substrate using a solder resist as shown in, for example, a plan view in FIG. 9, and portions of the conductive pattern 42k exposed through the openings 52x in the insulating film 50x define lands on the common substrate side used for the connection to elements 10a, 10b. 
When the lands are defined by the conductive pattern exposed through the openings in the insulating film in this manner, the conductive film must be larger than the openings in the insulating film in view of displacements of the insulating film and the conductive pattern. This disadvantageously prevents finer pitches of the bumps, and restricts design flexibility.
Moreover, when the solder bumps melt during the reflow process, the solder bumps wet and spread while being trapped inside the openings in the insulating film, and the mounting height of the elements is reduced. Accordingly, the permissible range of variations in the size of the solder bumps depends on the size of the openings in the insulating film. When the size of the openings in the insulating film is increased, the permissible range of variations in the size of the solder bumps is increased. However, this leads to an increase in variations in the mounting positions of the elements. On the other hand, when the size of the openings in the insulating film is reduced, variations in the mounting positions of the elements are reduced. However, the permissible range of variations in the size of the solder bumps is reduced.
When the size of the bumps is reduced to achieve lower profiles and finer pitches, the size of the openings in the insulating film must be reduced. When the size of the openings is reduced, accuracy in processing the openings must be increased, and variations in the size of the openings must be reduced. This leads to difficulty in processing and an increase in cost.